Build combinational and sequential circuits — 4-value logic, timing waveforms, truth tables
The Digital Logic Simulator uses an event-driven engine that models four signal states: logic 0, logic 1, unknown (X), and high-impedance (Z). Drag gates onto the canvas, connect them with wires, add input switches or clocks, and run the simulation to see propagated values on every wire and gate output in real time.
Waveform viewer — shows the time-domain logic transitions for every signal over multiple clock cycles. Truth table — automatically enumerates all input combinations and captures the combinational output for each. Expressions panel — derives the Boolean SOP (sum of products) expression for each output directly from simulation.
The engine tracks propagation delays through every path in the circuit and reports the critical (longest) path — the same metric used in professional FPGA and ASIC design tools.