SOP & POS — worked example
Digital Logic 101 · SOP & POS · Example
Majority vote: F=1 when ≥2 of A, B, C are 1
Three inputs, eight rows. Filling in the truth table by inspection and grouping by F-value:
# A B C F 0 0 0 0 0 (0 ones) 1 0 0 1 0 (1 one) 2 0 1 0 0 (1 one) 3 0 1 1 1 (2 ones) → minterm 4 1 0 0 0 (1 one) 5 1 0 1 1 (2 ones) → minterm 6 1 1 0 1 (2 ones) → minterm 7 1 1 1 1 (3 ones) → minterm
- Read off the canonical SOP. Take each F=1 row and write a literal per variable: bit=1 → bare, bit=0 → primed. AND within a row, OR across rows.
F = Σm(3, 5, 6, 7) = A′BC + AB′C + ABC′ + ABC - Read off the canonical POS. Take each F=0 row. Bit=1 → primed, bit=0 → bare. OR within a row, AND across rows.
F = ΠM(0, 1, 2, 4) = (A+B+C)(A+B+C′)(A+B′+C)(A′+B+C) - Sanity check: the index sets are complementary — and disjoint. Both forms describe the same function.
- Simplify the canonical SOP to its minimum form. Pair minterms that differ by exactly one literal: , , . ABC fans out to all three pairs.
F = AB + AC + BC
is the minimum SOP — three products, six gate inputs, instead of four products and twelve inputs in the canonical form. This is the well-known three-input majority voter circuit used in TMR (triple-modular-redundancy) systems.
Try other input patterns yourself. Open the Simulate stage and click the F-cells to flip rows — the Σm and ΠM expressions update in real time.