Diodes

Semiconductor Devices · Diodes · Learn

Symbol and terminals

A diode has two terminals: the anode (P-side) and the cathode (N-side). Conventional forward current flows from anode to cathode — the direction the schematic triangle points.

I_D (forward)Anode (P)Cathode (N)+
Figure 1. Diode schematic symbol. Triangle = anode → cathode; bar = cathode.
One-way valve: forward current flows anode → cathode. Reverse is blocked.

Physical structure

A diode is a single PN junction in a package. The depletion region between the P and N sides creates the built-in barrier; everything else follows from how that barrier responds to bias.

P (anode)N (cathode)depletion region
Figure 2. PN diode cross-section. Holes (open) on the P-side, electrons (filled) on the N-side, depletion region in the middle.

Three diode models

Real diodes obey the Shockley equation, but circuit analysis usually reaches for a simpler model first. Pick the coarsest one that still answers the question.

1. Ideal model

Forward-biased = perfect short. Reverse-biased = perfect open. No threshold, no resistance.

VD=0, ID0 (ON)orID=0, VD0 (OFF)V_D = 0,\ I_D \geq 0\ \text{(ON)}\quad\text{or}\quad I_D = 0,\ V_D \leq 0\ \text{(OFF)}
V_DI_Dideal: short forward, open reverse
Figure 3. Ideal model: vertical line at VD=0V_D = 0 forward, flat at ID=0I_D = 0 reverse.

2. Piecewise-linear (constant-drop) model

Adds a fixed turn-on voltage VFV_F (≈ 0.7 V silicon, ≈ 0.3 V germanium, ≈ 1.8 V red LED). Below the knee, no current; above it, a small forward resistance ronr_{on}.

ID={0VD<VF(VDVF)/ronVDVFI_D = \begin{cases} 0 & V_D < V_F \\ (V_D - V_F)/r_{on} & V_D \geq V_F \end{cases}
V_DI_DV_Fpiecewise: knee + slope r_on
Figure 4. Piecewise-linear: zero current until VFV_F, then linear conduction with slope 1/ron1/r_{on}.

3. Shockley (exponential) model

The full diode equation, accurate from cutoff into moderate forward conduction:

ID=IS(eVD/(nVT)1)I_D = I_S\left(e^{V_D / (n V_T)} - 1\right)

where:

  • ISI_S — saturation current (≈ 1 pA for small-signal silicon).
  • nn — ideality factor, 1.0 ideal, up to 2.0 for real junctions.
  • VT=kT/qV_T = kT/q — thermal voltage ≈ 25.85 mV at 300 K.
V_DI_D0.7 VShockley: I_S(e^(V/nV_T) − 1)
Figure 5. Shockley: exponential rise once VDV_D exceeds a few VTV_T. Reverse current saturates at IS-I_S.
Shockley for analogue analysis. Piecewise for hand calculations. Ideal for digital and switching logic.

Reverse breakdown

Beyond a critical reverse voltage VBRV_{BR} (Zener for thin junctions, avalanche for thick ones), reverse current spikes. Zener diodes exploit this for voltage references; ordinary rectifiers must stay below their VBRV_{BR} rating.

Application: half-wave rectifier

One diode in series with a resistive load passes the positive half of an AC input and blocks the negative half — the simplest AC-to-pulsating-DC converter.

V_in (AC)DR_LV_outI (positive half-cycle)
Figure 6. Half-wave rectifier circuit. The diode passes current only on positive half-cycles, so VoutV_{out} across RLR_L is non-negative.
V_in (AC)V_out (across R_L)00
Figure 7. Half-wave rectifier waveforms: input AC (top), output across the load (bottom). Negative half-cycles are clipped.

Smoothing capacitor (filter)

A capacitor in parallel with the load charges to VpV_p on each peak, then discharges through RLR_L until the next one. Pulsating DC becomes a near-flat level with a sawtooth ripple.

V_in (AC)V_out (with C smoothing) — sawtooth ripple at f00V_p
Figure 8. Half-wave with smoothing cap. Ripple period equals the input period T=1/fT = 1/f.

Peak-to-peak ripple voltage (linear-discharge approximation):

Vr(pp)VpfRLCV_{r(pp)} \approx \dfrac{V_p}{f \, R_L \, C}

Average and RMS — half-wave

Vavg=Vpπ,Vrms=Vp2V_{avg} = \dfrac{V_p}{\pi}, \qquad V_{rms} = \dfrac{V_p}{2}

Application: full-wave rectifier — bridge

Four diodes in a bridge route both half-cycles to the load with the same polarity. The cap refills twice per input cycle, so ripple frequency is 2f2f and ripple amplitude halves.

VsD4D1D2D3CRLBridge Rectifier+Vout0 V
Figure 9. Bridge rectifier with smoothing cap. On the positive half-cycle D1D_1 and D2D_2 conduct; on the negative half D3D_3 and D4D_4 take over.
V_in (AC)V_out — full-wave rectified (faint) + smoothed (solid) — ripple at 2f00V_p
Figure 10. Bridge output — full-wave rectified (faint) and smoothed (solid). Ripple at 2f2f, half the amplitude of half-wave for the same RLCR_L \cdot C.

Two diodes are always in the conduction path, so the load loses 2VF2 V_F (≈ 1.4 V for silicon) compared to the input peak.

Average and RMS — full-wave

Vavg=2Vpπ,Vrms=Vp2V_{avg} = \dfrac{2 V_p}{\pi}, \qquad V_{rms} = \dfrac{V_p}{\sqrt{2}}
Vr(pp)Vp2fRLCV_{r(pp)} \approx \dfrac{V_p}{2 f \, R_L \, C}

Application: full-wave rectifier — center-tapped transformer

A transformer with a center-tapped secondary plus two diodes also gives full-wave rectification. Each diode conducts on alternate half-cycles, using one half of the winding at a time.

AC supplyD1D2RL+Vout
Figure 11. Center-tapped transformer + 2 diodes — full-wave with one VFV_F drop instead of two, but the secondary winding must be twice as long for the same VpV_p.
Bridge: 4 diodes, 2VF2 V_F drop, simple transformer. Center-tapped: 2 diodes, 1VF1 V_F drop, but needs a 2× secondary. Both give the same Vavg=2Vp/πV_{avg} = 2 V_p / \pi and ripple at 2f2f.