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Logic Circuit Lab

Build gate networks, watch signals propagate, and explore Boolean algebra — from truth tables to K-maps in one place.

Examples:
Place:Gates:

Place switches (inputs) and LEDs (outputs) on the canvas, then add gates between them. Tap an output pin to start a wire · tap canvas to add corners · tap an input pin to connect. Click a wire to select it, then Delete or use the button. Drag any component by its body to reposition. Tap × to delete.

ABF
00
01
10
11

Truth tables and Boolean logic

A truth table lists every possible combination of inputs (2n rows for n inputs) and the corresponding output for each. Truth tables are the definitive specification of a combinational logic function — there is no ambiguity about what the circuit must do for any input state.

Logic gate behaviour

Each gate type implements one Boolean operation. The seven gates available in this lab cover every function needed for combinational digital design:

  • AND — output 1 only when all inputs are 1. Used in enable/select logic.
  • OR — output 1 when any input is 1. Used in fault detection and multiplexing.
  • NOT — inverts a single input. Converts active-high to active-low signals.
  • NAND — AND with inverted output. A universal gate — any logic function can be built from NAND gates alone.
  • NOR — OR with inverted output. Also universal. Early integrated circuits used NOR-only designs.
  • XOR — output 1 when an odd number of inputs are 1. The key gate in adders, comparators, and parity checkers.
  • XNOR — inverted XOR. Output 1 when inputs are equal. Used in equality detectors.

De Morgan's theorems

De Morgan's theorems let you convert between NAND/NOR and AND/OR/NOT forms. They are essential for simplification and for implementing logic with only one gate type:

A · B = A + BNAND = NOT of AND = OR of NOTs

A + B = A · BNOR = NOT of OR = AND of NOTs

Practical meaning: a NAND gate with both inputs inverted behaves identically to an OR gate. This is why NAND is universal — you can build NOT, AND, and OR from it, and from those three you can build anything.

Key Boolean identities

Boolean algebra lets you simplify logic expressions before building circuits, reducing gate count and propagation delay. These identities are the building blocks:

Identity
A · 1 = A
A + 0 = A
Annihilator
A · 0 = 0
A + 1 = 1
Idempotence
A · A = A
A + A = A
Complement
A · Ā = 0
A + Ā = 1
Double negation
Ā̄ = A
Absorption
A · (A + B) = A
A + (A · B) = A

Sum of Products (SOP) and minterms

Every Boolean function can be expressed as a Sum of Products — an OR of AND terms. To read the SOP from a truth table:

  1. Find every row where the output F = 1.
  2. For each such row, write a minterm: AND all input variables together, using the variable directly if its value is 1, or its complement (A) if its value is 0.
  3. OR all the minterms together to get the canonical SOP expression.
Example — row A=1, B=0, C=1 where F=1

Minterm = A · B · C

A is 1 → use A. B is 0 → use B̄. C is 1 → use C.

The Canonical form panel in this tool shows F = Σm(1, 3, 5) — the list of row indices where F = 1. The minimized SOP shown is the simplified result after Quine–McCluskey reduction.

Reading the Karnaugh map

A Karnaugh map (K-map) is a visual grid that rearranges the truth table so that logically adjacent cells differ by exactly one variable. This makes simplification visual: group adjacent 1-cells into rectangles of size 1, 2, 4, or 8.

  • Each group eliminates one variable per doubling in size — a group of 4 eliminates 2 variables.
  • Groups can wrap around the edges (the map is a torus, not a flat grid).
  • Use the fewest, largest groups that cover all 1-cells — this gives the minimal SOP.
  • Click View K-map to see the filled K-map and highlighted groups for your current circuit.

Common combinational circuits to try

Half adder
SUM = A ⊕ B, CARRY = A · B. The building block of binary arithmetic.
Majority function
Output 1 when at least 2 of 3 inputs are 1. Used in fault-tolerant systems.
NAND-only XNOR
Build XNOR using only NAND gates — demonstrating NAND universality.
3-input parity checker
F = A ⊕ B ⊕ C. Output 1 when the number of 1s is odd. Used in error detection.

Learn more → Logic Gates — Learn · Karnaugh Maps — Learn · Boolean Algebra — Learn · Digital Logic Simulator

Quick experiments

  • Watch the table double. Start with 2 inputs and read 4 rows. Add a third input and it becomes 8; a fourth makes 16. Every input you add doubles the work, which is why nobody enumerates a 16-input function by hand.
  • Separate XOR from OR. Compare the two columns on the row where both inputs are 1. OR gives 1, XOR gives 0. That single row is the entire difference, and it is why XOR forms the sum bit of an adder.
  • Confirm NAND is the inverse of AND. Put AND and NAND side by side. Every row is opposite. NAND outputs 0 in exactly one case — when all inputs are 1.
  • Read a sum-of-products straight off the rows. Pick the rows where the output is 1 and write each as a product, complementing the inputs that are 0. OR those products and you have the expression, no algebra required.
  • Prove De Morgan by table. Build NOT(A AND B) and (NOT A) OR (NOT B) as separate columns. They match on all four rows — a complete proof, since the table covers every possible input.

Formula reference

Rows in a truth table
rows=2n\text{rows} = 2^{n}

3 inputs → 8 rows, 4 inputs → 16, 8 inputs → 256.

Distinct functions of n inputs
N=22nN = 2^{\,2^{n}}

There are 16 possible two-input gates and 256 three-input ones.

Sum of products from the 1-rows
F=miF = \sum m_i

Each minterm is one row whose output is 1.

Exclusive OR
AB=ABˉ+AˉBA \oplus B = A\bar{B} + \bar{A}B

True only when the inputs differ.

SymbolMeaningUnit
nnNumber of inputs
mim_iMinterm — a row where the output is 1
\oplusExclusive OR

Common mistakes

  • Listing input combinations in an inconsistent order.

    Count upward in binary: 00, 01, 10, 11. Skipping or reordering rows makes the table impossible to compare against anyone else's, and hides missing cases.

  • Treating XOR as OR.

    They differ on exactly one row — both inputs 1. OR gives 1 there, XOR gives 0. Using OR where XOR belongs breaks every adder and parity circuit.

  • Forgetting that NAND is not NOT-then-AND.

    NAND inverts the result of AND, not the inputs. NOT A AND NOT B is NOR, not NAND — De Morgan's laws show why the two differ.

  • Assuming an unlisted row is 0.

    A truth table must cover all 2ⁿ combinations. A missing row is an unspecified output, not a zero, and synthesis tools may assign it either value.

  • Reading the output column as the expression.

    The output column is the function's values, not its formula. You still have to collect the 1-rows into minterms, or the 0-rows into maxterms, to write the expression.

Frequently asked questions

How many rows does a truth table have?

Two raised to the number of inputs. Two inputs give 4 rows, three give 8, four give 16 and eight give 256. Every extra input doubles the table, which is why large functions are handled algebraically instead.

What is the difference between a truth table and a K-map?

They hold the same information. A truth table lists rows in counting order, while a K-map rearranges those rows into a grid in Gray code order so that logically adjacent terms sit next to each other and can be grouped by eye.

How do I get a Boolean expression from a truth table?

For sum of products, take every row where the output is 1, write the inputs as a product with 0 inputs complemented, then OR those products together. For product of sums, take the rows where the output is 0 instead.

What is the difference between XOR and OR?

OR is true when at least one input is true, including when both are. XOR is true only when the inputs differ, so it is false when both are 1. XOR is the sum bit of a half adder; OR is not.

Why does a NAND gate output 1 when both inputs are 0?

NAND is AND followed by an inverter. AND of 0 and 0 is 0, and inverting gives 1. NAND only outputs 0 in the single case where every input is 1.

Related tools

Browse the full circuit toolkit or start a guided lesson in topics.

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